Samuel

PhD Student at ETH Zurich

[PULP Platform @pulp_platform]

Great joy at IIS! Our Heartstream 🤎 chip in GF12 with 64 cores, floating point support & systolic extension says "Hello" after @MarcoBertuletti, Samuel @saem_r and Yichao @yichao_zh, got the Serial Link, JTAG, and UART running. Cheers to that! https://t.co/VJBS0qTf6L @mazzergio

[Samuel @saem_r]

Thank you so much to the whole @pulp_platform group and everyone else for supporting me over the past years and for celebrating this moment with me! 🙌

[PULP Platform @pulp_platform]

Here we go! Congratulations 🎇🍾😄 to Samuel @saem_r who has defended his PhD thesis titled "Designing and Scaling Versatile Manycore Systems". Just a few pictures from the festivities that followed. Take a look at that cake🍰!

[PULP Platform @pulp_platform]

Here we come with Heartstream and Charlie The Bear in full beauty: How to tape-out a 64-core RISC-V SoC in under 60 days https://t.co/UwdyCX4kea Paper: https://t.co/pooyEAMZQg @mazzergio @yichao_zh @saem_r @MarcoBertuletti just presented at #RISCV Summit in Munich.

[PULP Platform @pulp_platform]

While Charlie the bear was busy in Zurich, our #DATE2024 team enjoyed one last 🌞😎 day with El Oso Valenciano 🧸🇪🇸 @saem_r @lucacolagrande3 @CristiCioflan @ThommyThomaso.

[PULP Platform @pulp_platform]

Samuel @saem_r presented LRSCwait where we introduce new atomic operations to eliminate polling and retries during synchronization in manycore systems: https://t.co/PS686tHk7z https://t.co/orMYYPiUdb Big thank you to Samuel for doing such an amazing job reporting from #DATE2024.

[PULP Platform @pulp_platform]

More from #DATE2024 in Valencia😀. Here is our Samuel @saem_r during the PhD Forum presenting a poster about his thesis. The poster "Designing and Scaling Versatile Manycore Systems" focuses on MemPool & extensions for synchronization and emulation https://t.co/L9vASZfkGV.

[PULP Platform @pulp_platform]

Our new paper aiming at efficient systolic execution on shared L1-memory manycore clusters is now on arXiv. Demonstrated on MemPool, check out "Enabling Efficient Hybrid Systolic Computation in Shared L1-Memory Manycore Clusters" @mazzergio @saem_r https://t.co/E0lcDOrFd4

[PULP Platform @pulp_platform]

Just in time for Valentine’s Day, here comes the first PULP chip of the year: Heartstream in GF12. An implementation of our MemPool architecture with 64 RISC-V cores. Supported by @GlobalFoundries UPP https://t.co/VJBS0qTf6L

[PULP Platform @pulp_platform]

Check out @saem_r's "LRSCwait: Enabling Scalable and Efficient Synchronization in Manycore Systems through Polling-Free and Retry-Free Operation" which proposes LRwait & Mwait synchronization primitives + their implementation Colibri with 6.5×throughput: https://t.co/Kbz1mQJbkc

[PULP Platform @pulp_platform]

Time for 🌊"Diving into MemPool: Scaling the Shared-Memory Cluster to 256 Cores" with Samuel @saem_r at PULP get-together in Lugano 😀. Check out the slides from his talk: https://t.co/MsY5sD5INS

[PULP Platform @pulp_platform]

In order to put to rest incorrect information that recently appeared on social media and several more prominent websites, we have published a summary of our project Occamy: https://t.co/GMps7YYIcB

[Samuel @saem_r]

@pulp_platform @Xikhari Scaling is a key challenge that MemPool addresses. We already scale well to 256 cores, and we are working on going even bigger. But scaling MemPool is not trivial as it is for classic systolic arrays. You can find all the details about MemPool here:

[PULP Platform @pulp_platform]

Samuel's @saem_r paper on MemPool, our scalable, shared-L1-memory manycore RISC-V system with 256 RV32IMAXpulpimg Snitch cores is now online. https://t.co/f5ujJfeyLN @suehtamacv

[PULP Platform @pulp_platform]

Samuel's @saem_r poster MemPool meets Systolic from #DATE2023 is now online, as well. Take a look: https://t.co/2mTZV1lNWP

[PULP Platform @pulp_platform]

Samuel's @saem_r paper on MemPool, our scalable, shared-L1-memory manycore RISC-V system with 256 RV32IMAXpulpimg Snitch cores is now online. https://t.co/f5ujJfeyLN @suehtamacv

[PULP Platform @pulp_platform]

Yesterday we concluded the first EFCL-sponsored project with Samuel's @saem_r talk "MemPool Meets Systolic", the best of the systolic & shared-memory combined to create a flexible and fast hybrid architecture. Check out the slides: https://t.co/H0XVRcZh51
https://t.co/cffuoeKoxe

[PULP Platform @pulp_platform]

We are sharing a couple of our Christmas cookies🍪🎄. These are actually our Minpool dies that just came back from manufacturing. https://t.co/7X4YBczGta. With several ‘min’pools maybe we can make a maxpool, or even a terapool. Now that is an idea.

[PULP Platform @pulp_platform]

Have you already checked out our Banshee? Samuel just recently presented "Banshee: A Fast LLVM-Based RISC-V Binary Translator" in his ICCAD2021 talk:
Github: https://t.co/XCTDqwQFu1
Slides: https://t.co/0E0Xdx0DBf

[Samuel @saem_r]

@unaimarcor @pulp_platform It is closer to QEMU as it translates a RISC-V binary to a different host ISA (e.g., x86, ARM). But Banshee also emulates a configurable target architecture as we want to run bare-metal code instead of user code relying on an OS.