Silicon Atlas

20 years designing chips. AI hardware explained: bottlenecks, trade-offs and economics. Evidence-first analysis + daily AI glossary cards.

[Silicon Atlas @Silicon_Atlas]

https://t.co/mnFBwrSsyF

[Silicon Atlas @Silicon_Atlas]

@WDChokepoint Good question. Module specs alone wouldn’t tell us. An independent teardown showing the cell layout and cross-section would be the clearest way to check.

[Silicon Atlas @Silicon_Atlas]

4F² DRAM promises smaller cells. Why doesn't that mean more supply overnight?
On Oct 10, CXMT said it targets a year-end launch for its first 4F² DRAM, a server DDR5 module. Three days later, Samsung and SK hynix each fell more than 7% in Seoul. Some analysts called it profit-taking.

4F² is the cell's footprint: four times F squared, where F is the process's smallest feature size. Today's DRAM cells take six.

The gain comes from the cell layout, even at the same feature size. The transistor's channel stands up instead of bending under the gate. CXMT says it wraps the gate around that upright channel to cut leakage.

Today, the cells and the support logic sit side by side on one wafer. Samsung's 2026 prototype split them: cells on one wafer, bonded on top of a logic wafer. CXMT has not said whether its first product does this.

If it does, there is a catch. Wafer-to-wafer bonding can't pick good dies to pair, so a bad die can leave its good partner unusable. Either way, the new transistor is hard on its own. New flows usually start at low yield.

Density at the same feature size is especially valuable to a company that cannot buy EUV scanners.

CXMT gave no capacity, speed or volume. Korean reports say the first parts may use 4F² only in part. Watch for chip specs, customer qualification and steady volume shipments.

The cell got smaller. The factory got harder.

[Silicon Atlas @Silicon_Atlas]

@fireandstart Exactly. When the cash comes in matters as much as the size of the backlog. Thanks for laying that out so clearly.

[Silicon Atlas @Silicon_Atlas]

@GiovanniZibordi Thanks for sharing this with your Italian readers, Giovanni! Strong AI demand and the cost of funding it are both worth understanding.

[Silicon Atlas @Silicon_Atlas]

@skewpilot This isn’t fearmongering. I wrote this to explain the financing concerns people are discussing. Anyone who follows my posts knows I’m highly bullish on the AI cycle. That doesn’t mean every company’s financing works out. Disagree with the argument, but keep it respectful.

[Silicon Atlas @Silicon_Atlas]

Why does a company with $104 billion in contracts still lose money?

CoreWeave sells GPU computing for AI. In Q2 2026 it brought in $2.58 billion in revenue and reported about $104 billion in backlog. It still posted a $626 million net loss.

Its net interest expense that quarter was $640 million.

Before interest, the business was close to breakeven, with an operating loss of $49 million. Interest turned a small loss into a large one.

Why so much debt? GPUs are paid for before a cluster goes live, while customers pay over several years. On the income statement, that equipment cost is spread out as depreciation. Much of the cash spending comes before the customer payments. Loans help bridge that gap. CoreWeave borrows against signed customer contracts and the GPUs themselves, so one contract brings in revenue and backs the loan.

A neocloud is a cloud company specialized in GPU computing for AI. Nebius, Lambda, Crusoe and Nscale are others, each funded differently.

Think of a landlord who signs the tenant, borrows to build, then repays the bank with the rent.

That is why financing conditions matter. This week, some CoreWeave bonds traded at yields around 15%, signaling pressure on future borrowing costs. Existing fixed-rate interest payments do not automatically rise.

A large backlog helps secure financing. It does not guarantee a profitable buildout. The real test is whether customer payments recover the equipment investment and financing costs, while arriving in time to meet debt payments. Not investment advice.

[Silicon Atlas @Silicon_Atlas]

@Autonn254315 @lothran1 That would be a much bigger problem. The debt would still need paying while customer cash disappeared. I’d separate that risk from the funding gap today: which contracts can be cancelled, and whether customers can keep paying.

[Silicon Atlas @Silicon_Atlas]

@lothran1 Newer GPUs clearly raise the bar. My point was that older GPUs can still earn, not that their returns are protected. The real test is what those contracts earn after power and financing costs, especially when they renew.

[Silicon Atlas @Silicon_Atlas]

@Josinho_Lores That’s the appeal of the landlord model: longer rent contracts without directly funding each GPU upgrade. The link I’d still watch is the tenant’s ability to pay, especially when a GPU cloud is the tenant. That connects the two businesses.

[Silicon Atlas @Silicon_Atlas]

@lothran1 The replacement cycle matters, but older GPUs can keep earning: CoreWeave said it signed an A100 contract through 2029. In Q2, the clearer pressure was financing: $640m in net interest against a $49m operating loss. I’d watch renewal prices and financing costs together.

[Silicon Atlas @Silicon_Atlas]

That’s a very fair point. Making the result easy to verify is part of the agent’s job too. I was thinking more about the attitude we bring to it: “Why did AI suggest this? Could it actually be better?” That curiosity is different from assuming an unfamiliar approach must be wrong. Same standards, but an open mind.

[Silicon Atlas @Silicon_Atlas]

Company docs need to go AI-native too. Markdown and HTML, not slides.

A pattern I keep hearing about in chip teams: an AI agent proposes dozens of RTL optimizations, and they get shot down because the reviewers can’t follow them right away.

Look at Go. No human pro beats AI anymore. The top players today are the ones who study with AI and play closest to it.

Chip design won’t be different. The bottleneck is human bias.

[Silicon Atlas @Silicon_Atlas]

Before calling a 2029 memory glut, count the work AI has not reached yet.

In my experience, AI use keeps growing despite legacy systems, approval rules and old habits. But most of it is still scattered. Few company-wide workflows run on it.

I expect another demand surge when those scattered efforts become trusted workflows.

The workload changes too. An assistant suggests code once. An agent runs tests, reads the failures and tries again. Every loop is another pass over a long context, and long contexts live in memory.

Today's constrained usage is a floor, not a ceiling.

[Silicon Atlas @Silicon_Atlas]

I'm bullish on AI-assisted chip design. For $AVGO, the catch is that customers may capture more of the gains.

The companies say OpenAI's models accelerated parts of Jalapeño's design and optimization, while Broadcom handled silicon implementation and networking.

I expect AI and RL to let customers bring more design work in-house, reducing what they outsource per chip and strengthening their bargaining power. Watch which tasks customers take over next.

AI-assisted design: more exploration, backed by independent checks.
https://t.co/tBmWxD7tDC
RL: learning reusable design skills from evaluated attempts.
https://t.co/cO0G9a3umo

[SemiAnalysis @SemiAnalysis_]

MEME: If GPT-7 is AGI, OpenAI could potentially ditch Broadcom entirely and bring everything in-house, as GPT-7 could be better than Broadcom at designing 224G SerDes, handling PD, and managing the supply chain.

[Silicon Atlas @Silicon_Atlas]

@SemiAnalysis_ The speedup doesn't come from more math. Decode is limited by memory reads, and the megakernel cuts the idle gaps between hundreds of tiny GPU jobs. It gets you closer to the memory speed limit, but it can't push past it.

[Silicon Atlas @Silicon_Atlas]

@Richdorai The software handoff is the practical test. Thanks for pointing it out: separate CPU capacity has to be easy for teams to deploy and use.

[Silicon Atlas @Silicon_Atlas]

AMD’s CPU-only Helion rack gives EPYC another route into AI spending.

A coding agent can ask a GPU-hosted model for an edit, then run tests on a separate CPU server. Customers could expand that execution capacity without buying another GPU rack.

I expect $AMD to gain orders where growing test workloads outstrip existing servers. Watch customer deployments and cost per completed task, including memory and networking. November availability is still a plan; rack capacity alone does not establish profitable demand.

[Lisa Su @LisaSu]

Had fun @OpenComputePrj today. A year ago we showed Helios and now we’re ramping Helios in production. Today we introduced Helion, an open, flexible rack for agentic AI and showed “Verano” - our newest agentic CPU for the very first time. Scaling AI takes the right compute, open standards and deep collaboration. Thanks to OCP and all our amazing partners across the ecosystem.

[Silicon Atlas @Silicon_Atlas]

@anishekkamal That’s the overlooked part: CPU use can fall while RAM stays occupied. I expect more memory per CPU in fleets with lots of waiting agents. Thanks for highlighting it.

[Silicon Atlas @Silicon_Atlas]

The AI agent boom will create winners beyond CPU suppliers.

A coding agent can give up CPU time while waiting, yet keep its workspace in memory. I expect fleets retaining substantial state during those waits to buy more DRAM per CPU.

I’ve made the full analysis free so more readers can see who benefits, with the figures and calculations included.
https://t.co/J7iB9fIPHa

[Silicon Atlas @Silicon_Atlas]

@harden_369741 That retained RAM is the part I’m watching too. Thanks for sharing your experience. It can change the next server order even when compute still has room.

[Silicon Atlas @Silicon_Atlas]

GPUs owned the AI spotlight. Agents are bringing CPUs back. But the memory story goes beyond longer context windows.

An agent can stop using a CPU core while its workspace stays in RAM. Scale up those waiting jobs, and the next order may be more DRAM beside existing CPUs.

That is another potential demand catalyst for Samsung, $SKHY and $MU.

Read the article for how two coding agents turn the same CPU upgrade into very different purchases.

[Silicon Atlas @Silicon_Atlas]

https://t.co/Q54CanwgU3

[Silicon Atlas @Silicon_Atlas]

@AIQuanting Thanks! In my example, stretching a job from 60 to 90 seconds through extra waiting takes memory needs from four servers to six, while CPU work still fits on one. Extra builds or tests would raise CPU demand too. It depends on what those calls do.

[Silicon Atlas @Silicon_Atlas]

$SKHY −15%. $Samsung −13%. China just announced a smaller DRAM cell.

I still favor HBM.

An AI agent waiting on a model call barely uses the CPU. Its code, tools and data still sit in DRAM. In the fleet I modeled, the CPU work fits on 1 server. The memory needs 4.

More AI systems, more memory in each. Most of $MU’s 2027 HBM supply is already under contract. China’s push hits server DDR5 first, not HBM.

Full analysis, and what would change my mind:
https://t.co/H1C6ocU0uc

[Silicon Atlas @Silicon_Atlas]

https://t.co/mnFBwrSsyF