Archgen AI

Build and ship chips faster with AI

[Archgen AI @archgen_]

🥳🥳🥳

[hari_haran @HariAyapps]

Thrilled to announce that @naveen_venk and I have joined @join_ef to build @archgen_ .

Our thesis is simple:
The next generation of semiconductor design tools will not just automate workflows they will learn from every engineer who uses them.

Chip design today is full of repeated manual effort.
1. A senior physical design engineer fixes a timing issue.
2. Another engineer solves a congestion problem.
3. Someone else discovers a better macro placement strategy.
4. A team spends weeks tuning PPA across hundreds of experiments.

But most of this knowledge disappears into scripts, logs, webex threads, reports, and individual engineer's memory.

We’re changing that.

At @archgen_ , we’re building self-learning agents for semiconductor design, with specific focus on physical design.

Our agents work alongside engineers, run EDA flows, inspect reports, debug failures, optimize PPA, and capture the reasoning behind successful workflows.
1. When an engineer solves something, the agent learns.
2. When a strategy fails, the agent remembers why.
3. When a similar problem appears again, the agent can reuse the right approach.

Over time, this becomes an organisational memory layer for chip design. One that compounds.

Our vision is to make chip design feel less like manually stitching together fragmented tools and more like working with a team of expert agents that get better every day.

The future of semiconductor design is self-learning.

Huge thanks to @suhasasumukh 🐐 and @localhosthq for being extremely generous with their credits and supporting us throughout.

#semiconductors #EDA #physicaldesign #ASIC #chipdesign #AI

[hari_haran @HariAyapps]

Thrilled to announce that @naveen_venk and I have joined @join_ef to build @archgen_ .

Our thesis is simple:
The next generation of semiconductor design tools will not just automate workflows they will learn from every engineer who uses them.

Chip design today is full of repeated manual effort.
1. A senior physical design engineer fixes a timing issue.
2. Another engineer solves a congestion problem.
3. Someone else discovers a better macro placement strategy.
4. A team spends weeks tuning PPA across hundreds of experiments.

But most of this knowledge disappears into scripts, logs, webex threads, reports, and individual engineer's memory.

We’re changing that.

At @archgen_ , we’re building self-learning agents for semiconductor design, with specific focus on physical design.

Our agents work alongside engineers, run EDA flows, inspect reports, debug failures, optimize PPA, and capture the reasoning behind successful workflows.
1. When an engineer solves something, the agent learns.
2. When a strategy fails, the agent remembers why.
3. When a similar problem appears again, the agent can reuse the right approach.

Over time, this becomes an organisational memory layer for chip design. One that compounds.

Our vision is to make chip design feel less like manually stitching together fragmented tools and more like working with a team of expert agents that get better every day.

The future of semiconductor design is self-learning.

Huge thanks to @suhasasumukh 🐐 and @localhosthq for being extremely generous with their credits and supporting us throughout.

#semiconductors #EDA #physicaldesign #ASIC #chipdesign #AI

[Archgen AI @archgen_]

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[Archgen AI @archgen_]

Archgen AI got a chance to attend the first ever Y Combinator startup school to be conducted in India! 🥳🥳

It gave us a chance to talk to Y Combinator Partners like @snowmaker , @agupta and @xuster pitch how we make the design time of chips will go down from months to weeks!

[hari_haran @HariAyapps]

Our paper on Privacy Preserving Load Forecasting via Federated Learning just got published!!🥳🥳

Personalized AI for energy is finally leaving the centralized silo.

Your home’s power data doesn't have to live in a utility’s database to be useful.

We show how to train high-accuracy load models across thousands of smart meters without ever moving the raw usage data. Instead, it ships "noisy" model updates and keeps the personal habits local.

It's not just keeping data private, it’s making the model actually better by letting it learn your specific routine.

When a utility predicts power demand, it usually needs to see exactly when you turn on your dryer or AC.

That is a massive privacy risk. High-res meter data is basically a map of your life.

The conventional fix is Federated Learning (FL), where the model goes to the data. But standard FL has a "heterogeneity" problem, it struggles because every house uses power differently.

Our paper introduces DP-SA-FedPer: an architecture that solves the privacy-utility-efficiency trilemma.

Differential Privacy (DP): It adds mathematical "noise" to model updates so no one can reverse-engineer your habits from the weights.

Secure Aggregation (SA): The server only sees the total sum of updates, never an individual household’s contribution.

Lightweight Personalization: The model is split. A global "base" learns general grid trends, while a local "head" stays on your meter to learn your specific 2 AM laundry habit.

> 95.2% Accuracy (outperforming standard centralized models).

> 12% lower communication cost than baseline FL.

> 6.5% boost specifically from the personalization layer.

Privacy isn't a tax on performance anymore. By combining secure aggregation with local "heads," we can build a grid that is more efficient, more scalable, and respects the front door.

@naveen_venk @archgen_

[hari_haran @HariAyapps]

Thank you soo much @agupta, @snowmaker and @xuster for putting together the first ever startup school in India!

@archgen_ is building AI agents to accelerate semiconductor chip design and has some awesome numbers to back our macro placement engine. Would love to get 5 min of your time to share more.

[hari_haran @HariAyapps]

Lessgoo @ycombinator startup school!!

@archgen_ is building ai agents for designing semiconductor chips, would love to catch if you're around.

[hari_haran @HariAyapps]

Thank you so much to the @OpenAIDevs team for giving us this opportunity to show what AI can do for silicon design!

Huge shoutout to @harshitm29 @gabrielchua @reach_vb for putting together this fantastic event 🙌

#CodexBLR

[Naveen Venkat @naveen_venk]

Your friendly neighborhood chip designers @OpenAIDevs Codex Hackathon Blr today

Met @reach_vb , @gabrielchua @RealAnkush

#CodexBLR

[Shivam Potdar @shivampotdar99]

@claudeai and I vibe coded a tool to convert OneNote content to Obsidian. Works completely offline without MSFT OAuth etc. and even with M365 setup.
I converted 600+ pages from 5 years of work incl all the links, images and drawings :)
https://t.co/oGFt7LNc9G

[Naveen Venkat @naveen_venk]

life after quitting corporate to build what you love :

@archgen_ @HariAyapps

[Naveen Venkat @naveen_venk]

3 weeks ago: ArchGen was chilling on page 5, basically the dark web

today: first result when you search it

secret SEO sauce applied.
@archgen_ @HariAyapps

[hari_haran @HariAyapps]

Seeing some really powerful results from GPT 5.4 as a macro placement engine opposed gemini, AlphaChip and autoDMP.

Best timing for RISC-V processors so far and some improvement in power consumption as well

[hari_haran @HariAyapps]

Expect @OpenAI to support startups

@archgen_ @OpenAIDevs @harshitm29

[Archgen AI @archgen_]

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[Archgen AI @archgen_]

The third edition of Archgen AI's newsletter is out! 🥳

[Archgen AI @archgen_]

Glimpses from @Magicball_dev Event.
Met smart people, amazing conversations and showcased Archgen !!

[Archgen AI @archgen_]

Hey everyone!

Find Archgen at the MagicBall AI Festival today at booth I-15 to find out how to build chips faster!

[Archgen AI @archgen_]

Hey everyone!

Find Archgen at the MagicBall AI Festival today at booth I-15 to find out how to build chips faster!