Cyberwakeup

Official Blog Site : IT News,Review Computer,Tech Inside,Software,Hardware,Gaming Gear

[TECH INFO @TECHINFOSOCIALS]

Another Big Leak from Apple Side 🍎

iPhone 18 Pro Series is coming up with latest generation A20 Pro Chip & this time the Significant upgrade will be seen in Heat Dissipation.

The Mechanism is no longer a dual layer Motherboard sandwitching the SoC (PoP Packaging where DRAM and chips are stacked on top of each other).

It's now coming with "WMCM" Packaging System where the DRAM is moved to the other side of the Package & It could lead to a Noticeable Performance Uplift.

[Nasdaq @Nasdaq]

.@SpaceX listing day is here. Watch live. $SPCX https://t.co/VTXg0N2TBc

[Cyberwakeup @cyberwakeup]

@js100radio​ @fm91trafficpro
08.25น.​
มีอุบัติเ��ตุ​ เส้นพระราม​ 9 ขาเข้าจรงไป​ แยกรามคำแหง​ รถเมลชนท้าย​ กับ​ รถส่วนบุคคล​ 3 คัน

[TrendForce @trendforce]

【DDR5 Spot Momentum Continues as DDR4 Tightness Spills Over to DDR3】

The spot market is carrying over last week’s momentum, keeping quotes generally on an upward trend. Inquiries are especially brisk for DDR5 chips, with buyers showing a greater willingness to accept higher prices. Meanwhile, the severe shortage and persistently high prices of DDR4 chips are forcing some buyers to downgrade to DDR3 alternatives, which is driving up prices of DDR3 chips in turn. The average spot price of mainstream chips (i.e., DDR4 1Gx8 3200MT/s) has increased by 2.22% from US$35.12 last week (June 3) to US$35.90 this week (June 9).

📷 Related news: https://t.co/is2lgDocDy 🔗
📷 For more on DRAM Price: https://t.co/XSeiHtKlrD 🔗

[TrendForce @trendforce]

🍎 #Apple's iOS 27 just dropped a major hint — Cupertino is reportedly engineering its software around flexible, larger displays ahead of a #foldable iPhone expected in 2H26! 💡More: https://t.co/XDD58frr5e 🔗

[TrendForce @trendforce]

💻 #NVIDIA unveiled RTX Spark at Computex, bringing CUDA to Windows laptops for the first time. Can it spark a new PC upgrade cycle? 💡More analysis from #TrendForce: https://t.co/bpfNTkqcpk 🔗

[Reuters @Reuters]

Nvidia plans to invest around $150 billion a year in Taiwan, CEO Jensen Huang said at the launch celebration for the chipmaker's planned Taiwan headquarters in Taipei, a week after rival AMD said it would invest more than $10 billion in Taiwan's AI sector https://t.co/EmEc6bSM7Y

[NEWS @NEWS2082680]

🔥 #TSMC’s 3nm prices may rise another 15% in 2H26, with 5–10% more hikes possible in 2027, as #NVIDIA and AI #ASIC demand keep advanced node capacity under pressure. 💡More: https://t.co/45qkX9KeLA 🔗

[Google Japan @googlejapan]

Google Workspace のロゴが、新しくなりました。

[Omer Cheema @Omercheema]

CXMT has higher revenue than Kioxia and SanDisk. China finally has a memory player.

[TrendForce @trendforce]

#Samsung, having phased out V6 NAND production in China, is reportedly moving to V9 NAND cleanroom build-out in Xi'an to accelerate its advanced node transition.

[TrendForce @trendforce]

While Jensen Huang prepares a supplier feast in Taiwan later this week, Lisa Su had already quietly made her rounds. #AMD's Zen 7 CPUs are reportedly eyeing TSMC's A14 node, with Powertech's advanced packaging potentially in the mix.

[Cyberwakeup @cyberwakeup]

100% OFF sale: FREE Bitdefender Total Security (save $9.99)! https://t.co/VVEWq32TU5

[TrendForce @trendforce]

#Micron is turning more upbeat than its March earnings call, with pricing and AI-driven demand supporting a stronger outlook amid tight memory conditions.

[TrendForce @trendforce]

👀 #Huawei has reportedly built 122TB #SSDs — without access to 100+ layer 3D NAND — using its proprietary Die-on-Board packaging, said to boost capacity density by 33%. 💡More: https://t.co/9i6bcB2sbv 🔗

[sigma capitalist @phithetasigma]

On Nvidia’s Vera CPU –

First, let’s revisit the CPU architecture (see attached image) and its bundled memory

The referenced SOCAMM is a data centre class modular form factor for LPDDR5X (not to be conflated as two different things)

Now, 1 LPDDR5X DRAM die = 9.6Gbps/bit (max). Assuming a 32-bit package, 1 LPDDR5X DRAM package = 9.6 x 32 = 307.2Gbps (~38GB/s) bandwidth

1 SOCAMM is constructed using four LPDDR5X DRAM packages. Total bandwidth per SOCAMM = 38 x 4 = ~154GB/s

The Vera CPU setup uses 8 SOCAMM (8-channel), and therefore has 8 x 154 = ~1.2TB/s of bandwidth

The 1.5TB refers to the capacity. Assuming 32 (8 x 4) LPDDR5X DRAM packages in 1 Vera CPU, this infers the use of 48GB DRAM packages (not 192GB), i.e., 32 x 48. This could be for thermal/power management reasons

In short, each Vera CPU set up = 8 SOCAMMs = 32 LPDDR5X DRAM packages = 1.5TB capacity (32 x 48GB) = up to 1.2TB/s of bandwidth

Second, on market opportunity

Nvidia guided visibility into ~$20B of CPU revenue this year. What is unknown is how this breaks down into sales configurations (and by extension, the memory modules/density types that may be required)

Possible configurations:

1 – as part of Vera Rubin. Assuming NVL72 setup (72 Rubin GPUs, 36 Vera CPUs), total LPDDR5X memory capacity = ~55TB (36 x 8 x 4 x 48), which could potentially be higher if they use higher-capacity memory packages (with liquid cooling)

2 – dedicated Vera CPU racks. Each rack packs 256 Vera CPUs, and therefore up to ~400TB of LPDDR5X memory (256 x 8 x 4 x 48), which could potentially be higher if they use higher-capacity memory packages (with liquid cooling)

3 – individual Vera CPU servers. On the low end will be single and dual socket servers, with one or two Vera CPUs per tray/node respectively. For this configuration, memory capacity = 1.5TB / 3.0TB (assuming use of 48GB modules, with air cooling). Whereas on the high-end, such as the ones being developed by HPE (Cray Supercomputing GX240), this could go up to 640 Vera CPUs = close to ~1000TB. There is also the HGX Rubin NVL8 configuration, with one or two CPUs wired up (with similar memory capacities as a the single/dual socket servers)

In short, it’s challenging to accurately size up the total bit demand for LPDDR5X without knowing the exact sales configurations

What may be a better play is memory PHY/controllers IP –

Each SOCAMM requires 4 x LPDDR5X PHY and memory controllers. For Vera CPU which uses 8 SOCAMMs, each CPU = 32 LPDDR5X PHYs and memory controllers. All that is needed is the average list/sale price for CPU, divide $20B by this number to derive the implied number of Vera CPUs to be sold, that then allows you to derive the dollar content for memory PHY/controllers

[Mark Gurman @markgurman]

BREAKING: Apple and OpenAI’s once-blockbuster relationship over ChatGPT integration in iOS has become strained and the AI startup is now preparing possible legal action against Apple, believing their deal has flopped. https://t.co/CE3qT9J3IK

[Cyberwakeup @cyberwakeup]

สรุปข่าว��ด่น IT รอบดึก — 9 พฤษภาคม 2026
อ่านต่อได้ที่ https://t.co/Ty0TMW4Gwj

[Cyberwakeup @cyberwakeup]

#สรุปข่าวไอที รอบครึ่งวันเช้า 09/05/2026 วาร์ปอ่านต่อ https://t.co/ICLeCf92N5

[Wccftech @wccftech]

PCI-SIG pushes PCIe 8.0 to 1 TB/s and 256 GT/s by 2028, an 8x leap over PCIe 5.0 built for data centers. https://t.co/nsPnWPZ4sE