Top Tweets for #SocDesign
🚀 Meet T2M at MWC Shanghai 2026!
Explore our silicon-proven Interface IP solutions for next-gen SoCs, AI, automotive, and connectivity applications.
📍 Shanghai, China
📅 June 24–26, 2026
#MWCShanghai2026 #T2MIP #SemiconductorIP #InterfaceIP #SoCDesign #ASICDesign #ChipDesign
Summer Internship Program- 2026 on "RISC-V Based SoC Design using Synopsys Tools" from June 15 – 30, 2026
Limited Seats Available – Register Now!
Registration Link:
https://t.co/LUcRhJ2mL0
#ksrct1994 #ksr #ksrei #SemiconductorDesign #VLSIDesign #RISCV #SoCDesign #SynopsysTool
TOMORROW:
Join OpenHW Foundation, CircuitSutra & RISE-DA for Advanced D&V flow for RISC-V SoCs using virtual prototypes + HLS.
See how shift-left methods accelerate HW/SW integration.
Register: https://t.co/UgY4QKifEY
#RISCV #HLS #SoCDesign
Join our upcoming #SoCTechTalk!
The OpenHW Foundation, CircuitSutra, and RISE-DA will show advanced D&V flows for RISC-V based SoCs using virtual platforms, HLS, and software-driven test cases.
https://t.co/6kF3z2QKpn
#RISC-V #VirtualPrototype #HLS #SoCDesign
Advanced D&V flow for RISC-V SoCs
Explore shift-left design with virtual platforms + HLS and see RISE-DA’s Agentic AI Spec-to-Silicon flow for early HW/SW validation.
Register here 👉 https://t.co/Xr0xpKsYXm
#RISCV #HLS #SoCDesign
Smarter ECOs: Inside Easy-Logic’s ASIC Optimization Engine https://t.co/vlAhhK8QNI #Asic #Easy-Logic #EasylogicECO #ECOSupport #Eda #SocDesign
Chiplets Reach an Architectural Turning Point at Chiplet Summit 2026 https://t.co/SEpW0GfJlS #Efpga #FpgaIp #Menta #Mosaics-lp #SocDesign #VincentMarkus
From RTL to volume production, we accelerate the silicon journey at every step with our Turnkey ASIC services.
Let’s build your custom silicon together.
https://t.co/min0YCI8jZ
#ASICDesign #SoCDesign #MixedSignal #SiliconEngineering #RTLDesign
MosChip drives innovation across domains with its ASIC platforms and services, offering mixed signal and edge device SoC solutions from RTL design to volume production.
https://t.co/min0YCI8jZ
#ASICDesign #SoCDesign #MixedSignal #SiliconEngineering #RTLDesign
Boost productivity with Libero® SoC v11.10 and its comprehensive, easy-to-learn development tools for our power-efficient flash, SoC and rad-tolerant FPGAs. View the full release notes: https://t.co/rP7eAWKOBj. #FPGA #SoCDesign #DesignTools
Aion Silicon (formerly Sondrel), an ASIC and SoC architecture partner, has announced that it has become a member of the Intel Foundry Accelerator Value Chain Alliance (VCA).
https://t.co/x505HmOVkQ
#IntelFoundryAlliance #ASICInnovation #SoCDesign
General-purpose CPUs can’t meet today’s AI, automotive, and edge demands. @EDNcom highlights how RISC-V + customization unlock new performance. Andes ACE™ + CoPilot make it practical for all teams.
Read more in EDN: https://t.co/9O2kbPO5vK
#RISCV #SoCDesign #CPU #EDN
In this instalment of the 3-part blog series, we dive deeper into some of the most critical challenges and considerations in securing today’s complex SoC architectures.
👉 Read Part 2 here: https://t.co/tDOM3aZ1ps
#SoCDesign #SemiconductorSecurity #HardwareSecurity #RISCV
Watch our live demo from the 62nd @DACconference where @Agnisys showcases seamless integration with @AlteraFPGA_ Quartus to simplify and accelerate FPGA and SoC development through smart automation.
https://t.co/yOoSzNRLlr
#DAC2025 #FPGA #SoCDesign #SemiEDA #semiconductors #62DAC
SoC design demands tight team collaboration and tough decisions — floorplans, libraries, implementation. Our webinar replay dives into the critical steps & how data-driven insights power innovation.
🎥 Watch now: https://t.co/EKUQasdO14
#SoCDesign #Semiconductors #TechInsights #SoCDesignWebinar
@Siemens and @alphawavesemi have formed an exclusive partnership to accelerate high-speed interconnect solutions for advanced SoC designs, advancing innovation in chip technologies.
Read: https://t.co/dgJvSN3Yux
#TechPartnership #SoCDesign #Innovation
Accelerating Automotive SoC Design with Chiplets https://t.co/CGTk7LsIxw #Adas #Automotive #AutonomousDriving #Cadence #ChipletFrameworks #Chiplets #HeliumSoftwareDigitalTwin #Infotainment #NeoNPUChiplet #SocDesign #SoCDesignCockpit #SystemChiplet #VirtualPlatforms
Discover the full potential of the Libero® SoC Design Suite. We’ll cover how to apply design constraints using the centralized constraints manager GUI, run synthesis and program your FPGA designs efficiently. Register now: https://t.co/QNTocnEUhj. #FPGA #SoCDesign #LiberoSoC
📚 #Day3 of the 5-Day Hands-on #FacultyDevelopmentProgram on VLSI SoC Design & Verification with #RISC_V was a success!
🗓️ Date: 20th June 2024
#VBIT #FDP #VLSI #SoCDesign #FacultyDevelopment #ECE #TASK #MavenSilicon #ProfessionalGrowth #Innovation #TechTraining #Event #Session
Sign up for our #free #webinar "Mastering the Verification Challenge in IC SoC Design: Examining How Requirements Management and Tracing Affect Success".
REGISTER NOW: https://t.co/JGAIfNC0dt
#ICdesign #SoCdesign #RequirementsManagement #Tracing #freewebinar
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