Michael

[Chips and Cheese @ChipsandCheese9]

Hello you fine Internet folks,

At @hotchipsorg 2026, @intel gave a limited look into their upcoming datacenter GPU, Crescent Island, and what it will be bringing to the table.

Hope y'all enjoy!

https://t.co/203tfJXvMZ

[TechPowerUp @TechPowerUp]

Intel Details "Crescent Island" Graphics: 32 Xe3P Cores, up to 480 GB LPDDR5X Memory https://t.co/7ZxSN8zXnf

[Michael @miktdt]

@Silicon_Fly Griffin Cove with HT

[Michael @miktdt]

@Silicon_Fly Coral Rapids isn't UC

[Michael @miktdt]

@Silicon_Fly I don't think it's just a minor IPC increase for Griffin Cove.

[Michael @miktdt]

@Haze2K1 I’m wondering which CPU will feature the first Xe4-LPG iGPU. I guess the next after Hammer Lake.

[Haze @Haze2K1]

Intel Xe4-LPG

[InstLatX64 @InstLatX64]

There are already two working desktop #NovaLake CPUID 300F15 among the #Intel test machines:
- 24c/24t 3400 MHz [1]
- 28c/28t 3200 MHz [2]
#CoyoteCove #ArcticWolf
#AVX512 #APX enabled
[1]: https://t.co/2lEwplAMCe
[2]: https://t.co/Sm8dxeCkXZ

[Jaykihn @jaykihn0]

The iGPU-specific PL2 is currently 40W.
The chip-wide PL2 is currently 154W.

[Jaykihn @jaykihn0]

Xe3P 12Xe L2 cache 20MB (Nova Lake) ⬆️
Xe3 12Xe L2 cache 16MB (Panther Lake)

[Longhorn @never_released]

https://t.co/1c8IMwFR62

> However, that is changing on GFX35+, 64-bit addresses are now supported by EUs.
> NVL-P, as the first GPU with 64-bit support, has the option to select the addressing mode with a bit in STATE_BASE_ADDRESS, but newer GPUs will only support 64-bit.

[Intel Foundry @Intel_Foundry]

Now in risk production, Intel 18A-P extends the Intel 18A process node family with additional power and performance optimization, while enabling IP reuse through design rule compatibility.

Learn more: https://t.co/kH7OlE6Yon

#IntelFoundry #Semiconductors

[Michael @miktdt]

@jaykihn0 With a PL2 of 154W it could be 65W for PL1.

[Michael @miktdt]

@Haze2K1 Only for Datacenter? Isn't it Crescent Island?

[Jaykihn @jaykihn0]

Preliminary.

Nova Lake -S 12Xe SKU is shaping up to require a specific 65W-level PD segment for full graphics performance.

It is the only segment demanding two VCCGT phases.

[Michael @miktdt]

@meme_ec It's over 😆

[Michael @miktdt]

@jaykihn0 VVC decode but no encode?

[Andreas Schilling 🇺🇦 @aschilling]

Intel at the @VLSI_2026 on #Intel18A-P:

- +18% lower power at iso-performance
- +9% fully routed block level performance at iso-power
- +20-40% improved thermal resistance
- new 5th logic Vt pair
- new W3P device in 180CH and 160CH

https://t.co/k59twiO0wI