ECOS Open Silicon

(Build an) Ecosystem for Collaborative and Open Silicon.

[ECOS Open Silicon @openecos]

A major milestone for open silicon: multiple chips from the first open-source 55nm shuttle have been successfully brought up! The designs span RISC-V SoCs, memory, PLLs and AI accelerators, validating an open EDA + IP + PDK flow.

Read more: https://t.co/f4Vx8qHpZh

[ECOS Open Silicon @openecos]

At JLC’s Spark Conference, ECOS met 2,200+ makers and engineers, showcasing 55nm open-source chips, dev boards, robots, game consoles and chip-design platforms—showing how open tools and low-cost tapeout can put custom silicon within reach.

Read more: https://t.co/4ldJLfqHZq

[ECOS Open Silicon @openecos]

ECOS Factory is building a silicon-validated IP library for ICsprout 55nm: the world's first SRAM Compiler for an open-source 55nm process, an online ROM Compiler and an open-source PLL, all designed to streamline open chip design.

Read more: https://t.co/f4Vx8qHpZh

[ECOS Open Silicon @openecos]

ECOS-ICS55-2610 free tape-out submissions are closed, projects are under review. Next ICS55 shuttle call planned—details to follow. MPC (Multi Project Chip) could cut future tape-out costs to a few hundred RMB. Meet us at Booth 15, JLC Open Source Hardware Conf, to learn more!

[ECOS Open Silicon @openecos]

Meet ECOS Team at JLC Open Source Hardware Conf!

Sept 19, 2026 | Booth 15, Hall 6, Shenzhen Convention & Exhibition Center. Explore fully open-source 55nm chips, dev boards, game console, robots, tape-out solutions. Hands-on demos & win swag!

Read more: https://t.co/zzIsWyy6Hq

[ECOS Open Silicon @openecos]

ICsprout 55nm Open PDK SRAM & PLL IPs are live!

SRAM: sync high-density single-port, ≤640 Kib. No GDS. Silicon-tested only at SoC level. Tapeout risk remains. https://t.co/RDALijn24D.
PLL: 5-40 MHz in, 0.5-1.2 GHz out. No GDS. Silicon-proven. https://t.co/XQ8McSaUhV.

[ECOS Open Silicon @openecos]

In Mar 2026, we joined the 2nd Pakistan Semiconductor Summit, debuting our "XiaoXin" Mambo Robot powered by a 55nm fully open-source chip! It drew massive crowds, with engineers eager to know about its clock frequency, SoC specs, and tape-out process.

#OpenSource #Chip #RISCV

[ECOS Open Silicon @openecos]

Excitingly, Luca, a Chips-IT Foundation PhD student we met at EFCL Winter School 2026, was fascinated by ECOS's 1st 55nm open-source chip. We gifted him an extra board, and after some dedicated hacking, he successfully got the demo up and running!

#OpenSource #Chip #RISCV

[ECOS Open Silicon @openecos]

At the EFCL Winter School 2026 hosted by ETH Zürich, four teaching assistants from our "One Student One Chip" (OSOC) introduced the ECOS Team's first 55nm fully open-source chip to European scholars, and presented the development boards to @pulp_platform and @tinytapeout.

[ECOS Open Silicon @openecos]

The embedded team refactored the SDK's underlying architecture, introducing an all-new HAL V2 and a modular build system. This upgrade significantly expands support for chip peripheral drivers, delivering a much more user-friendly development experience for embedded enthusiasts.

[ECOS Open Silicon @openecos]

In offline mode, users can log into the "Minecraft Server" deployed on the C2 board via a local PC's TCP port to experience this globally popular indie sandbox game. Due to limited hardware resources, the server focuses on implementing the protocol, map, and transmission stack.

[ECOS Open Silicon @openecos]

"XiaoXin" Mambo Robot: The fully open-source chip handles tasks including screen driving and motor control.

"XiaoXin" Robotic Arm: This system leverages the strong mathematical computing capabilities of the fully open-source chip to control servos via a wireless PS2 controller.

[ECOS Open Silicon @openecos]

The ECOS Team launched embedded project lines for handheld consoles and robotics, achieving a major breakthrough by running a lightweight "Minecraft server" on fully open-source chips to span from physical hardware control to virtual gaming.

Read more: https://t.co/VhfZSOQS1X

[ECOS Open Silicon @openecos]

Since our Dec 2025 shuttle, we've received many global tape-out requests from students, researchers, and hobbyists aiming for low-cost chips. Starting in 2026, the ECOS Team will launch a shuttle at least semi-annually, subject to submissions & the ICsprout 55nm timeline.

[ECOS Open Silicon @openecos]

@xhtimmo Wonderful!😀

[ECOS Open Silicon @openecos]

ECOS Studio is a chip design IDE powered by open-source EDA, IP, and PDK (ICsprout 55nm). It delivers a comprehensive, one-stop chip design solution for users worldwide, supporting the full-flow design process from RTL to GDS. See https://t.co/tw6OdVf0zt

#ChipDesign #OpenSource

[ECOS Open Silicon @openecos]

The ECOS Team opened its first batch of tape-out applications in Sep 2025, and submitted the GDSII to ICsprout for manufacturing in Jan 2026. This batch includes 26 OSOC cores, 4 digital chips, 2 analog chips, and several PLL/SRAM test chips.

Read more: https://t.co/CvM6mhwicZ

[ECOS Open Silicon @openecos]

The ECOS Team has successfully taped out and powered up the world’s first fully open-source 55nm RISC-V processor chip, built entirely on open-source EDA, IP, SoC, and PDK (ICsprout 55nm, the most advanced open-source process node globally)!

Read more: https://t.co/CvM6mhwicZ