@drx The Changelings great link is a curious post-singularity end state. Seamless thought coherence seems like is has a steep cost in interconnect bandwidth.
“if 64 bit is so good then why don’t we have 65 bit architectures”
We kinda do, actually.
Just mostly as hardware, not pointers.
Intel Itanium’s general purpose registers were 65 bits; the last bit was known as a NaT flag. NaT stood for “not a thing”, which was a really interesting way of handling speculative execution.
Basically NaT was a poison flag to say “hey this result might be garbage we’ll deal with it later”.
Today we don’t really think about it, modern CPUs basically do all of their speculation in hardware…and throw out incorrect guesses without any user awareness.
Itanium was essentially a bet that with enough primitives exposed compilers *might* be able to make better decisions at compile-time (versus say, hardware guessing at runtime).
A (very) simplified way of putting it, is that on x86 you’re getting constant micro-stalls that the hardware deals with (…die space penalty), where *hypothetically* Itanium with a perfect compiler had no micro-stalls
…but really, really bad macro stalls (NaT recovery is a sloooow software fix).
Turns out, it was really difficult to write compilers that kept Itanium’s pipeline fed with anything that looks like a normal OS. But, it’s really interesting to see the general idea of “compiler handles the scheduling” coming up again with Cerebras (and arguably, the whole accelerator space)!
We’ll see how it pans out…
(Itanium was lovingly referred to as the “Itanic” by many)
i can’t believe paul townend forced and whipped gold dancer across the finish line with an obviously broken back then got to race the next day and win the national on i am maximus