Top Tweets for #RISCVSUMMIT
A really interesting talk by @LucaBeniniZhFe at #RISCVSummit, great to see some of the work going on around innovative hardware for #ai
At the #RISCVsummit @LucaBeniniZhFe is giving a keynote on how the AI race us just beginning and what we can do going into detailed with closely coupled accelerators
#RISCV @pulp_platform
Day 1 at #RISCVSummitEurope in Bologna!
Stop by the DeepComputing booth to see our latest RISC-V laptops and platforms, and don't forget to grab a raffle ticket for a chance to win a DC-ROMA RISC-V Mini PC!
Winners will be announced at tonight's Reception.
#RISCV #RISCVSummit #DeepComputing
Excited to join the upcoming #RISCVSummitEurope2026 in Bologna!
DeepComputing will be showcasing the latest innovations at Booth #10. Come visit us and explore the future of open computing.
#RISCV #RISCVSummit #Linux #OpenSource @risc_v
We’re heading to RISC V® Summit Europe with @Lauterbach. Join our interactive workshop on PolarFire® SoC, PowerTrace and TRACE32, plus a live Zephyr OS session. Register for this must-attend event: https://t.co/SIr1fGVY2C. #RISCV #RISCVSummit #Embedded #Workshop
@Siemens' Geir Eide presented a #RISCVSummit session on how the company is empowering SoC architects and designers to realize the potential of RISC-V using their latest solutions.
Watch the full session here: https://t.co/1eXYjQG3Dd
The momentum around RISC-V continues to build, and this year’s #RISCVSummit showcased just how fast the ecosystem is advancing.
The Summit delivered sessions that were both insightful and inspiring. Visit @ElectronicDesgn’s dedicated page to explore top sessions and takeaways: https://t.co/ETeZ8z183b
RISC-V is ready to power the era of Intelligent General Computing.
During his #RISCVSummit session, @Andes_Tech's Dr. Charlie Su discussed the rise of Intelligent General Computing and how the RISC-V ecosystem is evolving to meet its demands.
Watch the full session to learn more about RISC-V-enabled innovations in large-scale AI/ML and Andes’ latest solutions: https://t.co/6sq6LXDyN9
RISC-V International VP of Technology Tom Gall reflected on his first #RISCVSummit in his new role, sharing key moments from the show, including early RISC history, ecosystem advancements, and bold visions for open-standard computing. Read his top 7 takeaways: https://t.co/0gCZ1VbtYm
RISC-V International and our global ecosystem are wrapping up the year strong, continuing the momentum from #RISCVSummit in Santa Clara.
Catch us at upcoming events:
📅 Nov. 11-12: EDGE AI Taipei 2025
📅 Dec. 4: RISC-V Days Tokyo
📅 Dec. 11-13: Linux Plumbers Conference
https://t.co/tQKoVtrXsi
.@EDNcom's Majeed Ahmad recapped #RISCVSummit, highlighting key trends and updates, including the latest CPU cores featuring new vector processors, high-speed interfaces, and peripheral subsystems, as well as insights into RISC-V’s design ecosystem: https://t.co/yqAiy2ESzk
At @eetimes, The Linux Foundation's Daniela Barbosa discussed a new approach: combining the openness of RISC-V with blockchain. Read more about this use case that Daniela presented at #RISCVSummit: https://t.co/VIFYhvMSm0 #RISCVEverywhere #Blockchain
Thanks @risc_v for the invite to give a keynote at #RISCVSummit a couple of weeks ago. We have seen great progress in #RISCV for #HPC, and given promises by vendors and progress in the sw ecosystem I predict that 2026 could be a watershed year.
https://t.co/w634c2h5Ek
🎥The wait is over! All RISC-V Summit North America sessions are now available on RISC-V International’s official YouTube channel! Catch all sessions on our channel now: https://t.co/tGPI7ljVYS #RISCVSummit #RISCVEverywhere
felix86 25.11 is now released, bringing SSE 4.2 support and more optimizations!
https://t.co/Wx8GU9BrQV
We also had a presentation at #RISCVSummit. It is now on YouTube and talks about some low-level translation details.
You can watch it here:
https://t.co/ezgtV3RLmX
During #RISCVSummit, we announced a major milestone: RISC-V International is now approved as a recognized Publicly Available Specification (PAS) Submitter by the ISO/IEC Joint Technical Committee (JTC 1)! No other ISA has ever attained this status. Learn more: https://t.co/gYyZNn5Oka
Thank you @risc_v for an incredible #RISCVSummit!
Great to connect with our ecosystem partners, BrainChip, Arteris, Baya Systems, proteanTecs & S2C EDA, and share Andes innovations in AI, security & next-gen RISC-V CPU IP.
#RISCV #RISCVEverywhere
@Canonical at the #RISCVSummit North America 2025!
It’s been an exciting week in Santa Clara, showcasing how #Ubuntu is powering the next wave of RISC-V innovation, from supporting the RVA23 specification, new hardware to ecosystem partnership announcements.
Highlights at a glance:
🔶 ESWIN EBC7702 Mini-DTX launched with Ubuntu 24.04 LTS pre-installed
🔶 Expanded collaboration with Alibaba DAMO Academy
🔶 Non-stop demos, packed conversations, energized open source community
Catch the moments from our booth and partner demos ⭐
#RISCV #OpenSource #Linux
The dev zone at #RISCVSummit was crammed full of interesting things and very popular this week, here I chat to Austin @risc_v about the #HPC #RISCV demo we had brought from @EPCCed . Thanks to Carl for providing the hardware and installing things!
That’s a wrap on #RISCVSummit 2025! A huge thank you to everyone who contributed to making the event so incredible. Let’s continue to build the future of innovation on RISC-V together. #RISCVEverywhere!
Thank you to our Diamond Sponsors: DAMO Academy Xiantie and @MicrochipTech.
And thank you to our Platinum Sponsors: Akeana, @Andes_Tech, @AxeleraAI, @BrekerSystems, @Siemens, and @tenstorrent.
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