@jukan05 HK Language: English is widely understood. Cantonese is really only needed for older places/local work environments.
SG: English everywhere
sry dont have premium lol, feel free to DM!
@jukan05 HK: (I am a Sgrean based/working in HK for a SFO)
Rental similar to SG, but small/expensive
Finance: IPO market here is more vibrant, bulges still work out of HK as launchpad to Greater China and issuances. Market here is more exciting vs SG's.
$VOR Anti-ARPIL/BAFF inhibitor in phase 3 studies for gMG and Sjogren's, data for gMG mid-27 and Sjogren's mid-28. Approved in China for gMG on a ~5 point MG-ADL delta vs PBO (almost double Vyvgart) and likely soon to be approved in Sjogren's w/ positive phase 3 data in hand.
After adjusting for genetic and standard of care differences between China studies that led to its approval in CN and the global phase 3 studies VOR is currently running, our base case estimate is that telitacicept should likely handedly beat Vyvgart on an MG-ADL benefit with a favorable dosing profile and what we expect to be a benign safety profile, establishing it as best-in-disease.
Sjogren's similar story as gMG, but an even bigger whitespace.
Comp is $ARGX if it works.
Not investment advice. I may be long or short securities discussed and may trade without notice. This reflects my views only, based on incomplete information and probabilistic judgment. I can be wrong. Do your own diligence.
Interview with a $GOOGL employee explaining that the value when it comes to ASIC design from companies like $AVGO, Mediatek, and $MRVL is in their $TSM allocation, not the co-design anymore:
1. When it comes to co-design of chips, he thinks the real value of companies like $AVGO, Mediatek, and $MRVL lies in their $TSM allocation and memory allocation, which they got sooner than everyone else. In the whole process, he sees platform verification and then manufacturing as key.
2. If you could flip a switch and completely reset the $TSM allocation, he thinks the hyperscalers would move 100% to internal co-design and skip the co-designers for that part. There is still value in $AVGO's IP for memory, or in $MRVL's interconnects, but for co-design specifically, he thinks it comes down to $TSM and the memory supply chain allocation.
3. In the future, he thinks hyperscalers will move to direct $TSM relationships.
4. When it comes to $AMZN's Trainium, he thinks the split of IP rev share between co-designer and $AMZN is around 60% $AMZN and 40% co-designer right now. For the OpenAI ASIC, he thinks the split going to the co-designer is much higher, since OpenAI doesn't have an EDA department.
5. The expert doesn't think hyperscalers can bring every part of the accelerator build in-house, things like switching, interconnects, DSPs, etc. But the specific chip design angle he thinks has reached its peak in value.
6. When it comes to interconnects, he thinks demand will continue to grow for both copper and optics, as copper is still and will continue to be cost-effective for smaller distances, while optics will be essentially for longer distances. If copper is 100% today, he thinks it will be 70% copper, 30% optics in the next 2-3 years. That said, it doesn't mean you are reducing copper usage as the whole pie grows.
found on @AlphaSenseInc
Goldman Sachs: AI Server
> The AI server market is projected to grow from $195B in 2025 to $1.244T in 2030 at a massive 45% CAGR.
> The traditional market is growing at a slower pace from $89B to $164B at a 13% CAGR.
> By 2030, the AI server market will dwarf the traditional server market by nearly 7.5 times.
Segment Breakdown
Hyperscalers
This segment commands the largest share of the AI market, growing from $135B (2025) to $612B (2030) at a 35% CAGR.
"White box" vendors dominate both traditional and AI server setups for Hyperscalers.
Neoclouds & Service Providers
This segment has the highest growth rate in AI, skyrocketing at a 64% CAGR from $45B to $540B.
Dell (39%) and SMCI (39%) tie as the leading AI vendors here.
Enterprises
Enterprises make up the smallest slice of the AI pie, going from $14B to $92B (45% CAGR).
Dell and HPE split the top vendor spots evenly at 28% each for AI.
$DELL $SMCI $HPE
Great post from SemiAnalysis
CXMT will generate nearly $55B in revenue this year
They will IPO at nearly $50B market cap
GM is easily over 75%
Will be the most explosive IPO of China ever
https://t.co/2tpityZJU8
This is actually a really important point. If CXMT’s DRAM ASP is only about 5–10% lower than Samsung, SK Hynix, and Micron’s, it suggests that China currently has no interest in dumping memory. They want to make money too, don’t they?
New report @DiligenceStack
Power semis is a moment, and analog is REALLY having its moment. As compute requires more power the attach for power semis is significant. And hard...
GPU Tsunami Beneficiaries: Power Semis and Analog
https://t.co/ZACPVQWMHz
MediaTek choosing Intel EMIB-T could be a real edge.
If MediaTek’s v9 ramps in late 2027 ahead of the competing N2 project, it could gain meaningful share in Google’s next-gen TPU roadmap
$INTC packaging becomes a timing advantage, not just an alternative!!!
When I spoke with $LPK CEO, he was clear that:
→ TGV is solved. LIDE is proven, and ramp-up orders are now expected
→ Metallization remains the biggest hurdle to achieving good yields, yet two players are clearly ahead of the pack in that aspect
Doosan(000150) rallied on renewed AI optimism surrounding Jensen Huang’s Korea visit, but the market may still be underappreciating one of its most interesting hidden assets: its strategic exposure to the custom ASIC ecosystem through its stake in SemiFive(490470).
While most investors focus on Doosan’s direct AI infrastructure businesses, SemiFive has emerged as one of Korea’s most important ASIC design platforms, helping customers develop custom AI accelerators and specialized semiconductors at a time when hyperscalers are increasingly shifting beyond off-the-shelf GPUs.
As the AI industry moves toward a world of custom silicon, advanced packaging, and vertically optimized infrastructure, Doosan is exposed not only to the physical AI supply chain but also to the design layer through SemiFive.
This creates a rare combination of hardware, infrastructure, and semiconductor design optionality under a single umbrella.
The market is increasingly rewarding companies tied to the ASIC value chain, and SemiFive's growing relevance suggests that Doosan's stake could become more strategically important than many investors currently assume.
Jensen Huang's visit may be less about a short-term headline and more about highlighting where the next phase of AI investment is headed: custom silicon, advanced packaging, and the broader ASIC ecosystem.
https://t.co/HtIzJeY0vM
Chairman Chey Tae-won seems really candid.
“If we can’t supply enough memory, our customers will optimize their algorithms in a way that uses less memory.”
While Intel gains external customers using EMIB – Google's TPU being the big one – they're moving away from it for their own products. Diamond Rapids will likely use UCIe over substrate for a long-reach die-to-die interconnect instead.
At ISSCC, Intel showed a UCIe-S D2D link on 22nm hitting 48 Gb/s/lane over standard organic substrate at a reach of up to 30 mm. Beat a 3nm design with 3× higher data rate and 2.8× higher bandwidth density.
5-2-5 substrate vs 11-2-11 on EMIB. With substrate in short supply, Intel's "best" packaging tech – for everyone but Intel.
Rumor: Google to shift to a COT model starting with TPU v9, downgrading the role of MediaTek/Broadcom.
This would be a major negative for Broadcom and MTK.
According to this rumor, starting with TPU v9, Google plans to move to a model similar to AWS’s Annapurna, where Google directly places wafer orders with TSMC.
In other words, Google would be doing COT directly.
What does that mean? Google would become TSMC’s direct customer, while Broadcom and MediaTek would be downgraded to IP support / design service roles.
Ownership of the chip and control over supply would shift toward Google.
In other words, Broadcom/MediaTek’s per-chip margin would fall, if this is true.
Instead of recognizing the full chip ASP as revenue, the model would shift toward design service fees / margin. That makes me more worried about Broadcom than MediaTek.
$AVGO
If you’re watching the InP squeeze play out and wondering where to find the next one, we compiled this (incomplete) list of potential bottleneck areas from AI demand:
Looking ahead, as packaging evolves toward near-memory computing, and logic-to-memory stacks (L1/L2/L3) become thermally co-located, the role of TIM1 becomes central to power delivery integrity, cooling efficiency, and ultimately system-level reliability.
Thus, in the post-CoWoS era, thermal interface materials are no longer auxiliary—they are foundational to the performance and viability of AI and HPC systems.
https://t.co/Y2LaxZjbpz
"According to him, the $GOOGL TPUv7 is 30% more efficient to run (energy) and 10% less performant than $NVDA's Blackwell. If power is your bottleneck, you would take that 30% and aggregate more TPUs together."