Andreas Olofsson

Moved to

[Andreas Olofsson @zeroasic]

I am done with Twitter. See you in the real world.

[Andreas Olofsson @zeroasic]

@ayazdanb Thank you for the kind words Amir!

[Andreas Olofsson @zeroasic]

Finally, a proper "pip/npm for hardware", major SiliconCompiler upgrade, https://t.co/0D2dJhIFBF .

Try it!

import siliconcompiler
import umi # design
chip = siliconcompiler.Chip("top.v)
chip.use(umi) # pulls in dependencies
# your code
https://t.co/IBo4W4ryQb()

[Andreas Olofsson @zeroasic]

Get ready for the post Moore wafer-scale era. Check out our latest paper showing RTL simulation of a million cores processor. (RISC-V) https://t.co/D0Pculkonu

[Andreas Olofsson @zeroasic]

@devbisme @njrabit Working on it...

[Andreas Olofsson @zeroasic]

We just open sourced Logik, our light weight Python based FPGA toolchain. No more TCL and 100GB binary blob downloads! Please try it,we are proud of this work.🙏

https://t.co/hQnYeikJzB

$ python -m pip install --upgrade logik

[Andreas Olofsson @zeroasic]

This post shows how to build and verify your own chip(let) in Python. Writing SV testbenches is not fun, Switchboard and SiliconCompiler improves life quality! 😉Try it out and let us know what you think.

https://t.co/nnuZY5Pnc6

[Andreas Olofsson @zeroasic]

If you haven't tried SiliconCompiler yet, you really should;-) Convert Verilog to GDS in one line.

$ pip install siliconcompiler
$ sc <yourmodule>.v

[Andreas Olofsson @zeroasic]

@satnam6502 Sorry to hear that, but not surprised. The process of renewing a Swedish passport has become outright hostile...same goes for immigration (personal experiences).

[Andreas Olofsson @zeroasic]

We have decided to open source "switchboard", the powerful low latency communication library at the core of our emulation platform. It may look easy, but it's not.

https://t.co/5JT8CghYvA
https://t.co/ob1cggft8K

[Andreas Olofsson @zeroasic]

@RajaXg End customers are definitely becoming more demanding.

2000: Give us FFT, blas libs + datasheet, we'll do the rest..

2010: "How do I write parallel programs?". It better not be harder than serial codem

2020: How fast/efficient can you perform X?

2030: Just give me answer...

[Andreas Olofsson @zeroasic]

We have open sourced our "Universal Memory Interface" protocol for chiplets. Includes a complete reference implementation. Spread the word.🙏 https://t.co/EYvmSdqSwB

[Andreas Olofsson @zeroasic]

Hi old friend! Zero ASIC came out of stealth today to launch the ChipMaker ASIC design and emulation platform. I can almost guarantee that you have never seen anything like it. Try it out and let me know what you think! https://t.co/MZWLE5qW4h

[Andreas Olofsson @zeroasic]

@soronpo @antmicro @CHIPSAlliance @f4pga @XilinxInc @QuickLogic_Corp @latticesemi @siliconcompiler @OlofKindgren The @f4pga developers are all familiar with fusesoc, edalize, siliconcompiler. I am sure they have good reasons for their approach, perhaps they can comment?

[Andreas Olofsson @zeroasic]

@soronpo @WhiteHouse yup

[Andreas Olofsson @zeroasic]

@satnam6502 Wishing you a speedy recovery! I got it at DAC in july and was down for a couple of weeks.

[Andreas Olofsson @zeroasic]

@mtaht Wow, that's amazing, I did not know that. I will keep that in mind when we get close to an IPO.😀

[Andreas Olofsson @zeroasic]

Why isn't there a "Nobel prize" for open source? The companies that made trillions off open source infrastructure need to step up! I am tired of seeing my heroes spending decades working for free without proper monetary recognition. (please share). 1/n

[Andreas Olofsson @zeroasic]

@jcawley01 Fellowships can be very effective. Maybe @gvanrossum can comment on how his stint at IDA helped push Python forward?

[Andreas Olofsson @zeroasic]

@jcawley01 Yeah, the Nobel price is more of an appreciation gift, doesn't really affect outcomes. Still, long service should be rewarded.

[Andreas Olofsson @zeroasic]

Who did I miss? n/n

[Andreas Olofsson @zeroasic]

Aliaksei Chapyzhenka for wavedrom 10/n