Tough to express how proud I am of this team and what an achievement this shipping milestone is. The battles along the way were numerous and they make this victory that much sweeter. They’re just getting started.
Safe to say the computing world won’t be the same.
@bcantrill@sdtuck @steveklabnik @jessfraz@mrskatehicks@arjenroodselaar@ahl
So incredibly proud to have spent the last 3 years working alongside some of the smartest people I’ve ever met at @oxidecomputer. Today we did a thing… we officially shipped our first rack!
@syncsrc So I did actually find that thing when trying (not) to make K.2, but I didn't find rigid U.2 extenders that were workable. The flexible cable doesn't work that well as I have to blind-mate it ~120mm deep in the sled's drive bay, with only ~23mm of horizontal space.
@syncsrc Nope, doesn't fit in our drive bay. My extender is ~160mm long to get out far enough so we can connect the ethernet card without modifying the sled's enclosure.
@robdimond This is a 1Gbps NIC which is PCIe gen2 x1. I'm using no special low-loss material here, no custom stack-up, just a quick turn PCB. It's good enough for this use-case for which it was designed. Our actual sled and sharkfin riser can do PCIe gen4 x4 (using nicer material).
@bitshiftmask@oxidecomputer We have another (as-of-yet untold) bidirectional level shifter story to tell when we discuss our 2nd pass server sled bring-up. Stay tuned! :)
@c50bae86ae1b461 @jonmasters@oxidecomputer As I understand it, DDR5 has both side-band ECC (which like DDR4 etc facilitates detecting errors in the chip and/or on the coms channel, and may still be optional) and on-die ECC (strictly facilitating faster speeds and smaller process nodes with ~the same reliability as today)
@bcantrill@ahl @random_enginerd @AaronHartwig1 @arjenroodselaar U35 was also not the right part for that footprint so it was added manually with some creative rework