We’ve designed and built our first AI chip: Jalapeño.
Designed from the ground up by OpenAI and brought to production with @Broadcom, Jalapeño is purpose-built for the LLM workloads powering ChatGPT, Codex, the API, and future agentic products.
Chips are foundational to the AI economy. Building our own expands our full-stack platform from products to models to infrastructure, and will help us scale intelligence, serve more people, and expand access to AI.
At @OpenAI, we believe that AI can accelerate science and drug discovery. An exciting example is our work with @RetroBiosciences, where a custom model designed improved variants of the Nobel-prize winning Yamanaka proteins. Today we published a closer look at the breakthrough. ⬇️
At @ChipStackAI, we collaborated closely with @OpenAI to use Reinforcement Fine-Tuning (RFT) to fine-tune o1-mini and o3-mini on a key chip design task: improving Verification IPs (VIPs) wiring for the given design. We saw a 12% improvement with just 36 samples!
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Inference token generation is one of the most exciting performance races in recent history. Tireless hard work and engineering creativity has enabled companies like @cerebras , @GroqInc , and @SambaNovaAI reach these impressive milestones. I congratulate everyone behind this achievement, it's no small feat.
Not all performance is created equal, though. In this post, we peek behind the API curtain to measure Silicon efficiency of various providers: https://t.co/uRJGMyRAZK
Thanks @ArtificialAnlys for meticulously bencmarking and documenting these results. Data from this website makes such comparisons possible. Let me know what you think!
Running at 430 tokens/second using full precision and 8 sockets, #Llama3 from @AIatMeta is now available on SambaNova Platform: https://t.co/hawsGeK32W
🚀Get full 16-bit precision
🚀Spend on only 8 chips, not 576 chips for 430 tokens/second!
Trim chips, not precision!
Test out Llama 3 by Alat Meta at https://t.co/hawsGeK32W
#Llama3 #SambaNova #LLM #AI #GenAI
@samps Weird. I would think a programmable ASIC is just a chip that runs soffware, has an instruction set, etc.. *shrug*
(I'd say an FPGA is more like a "reconfigurable chip")
In April, '17, @jsomers of @NewYorker reached out & said he wanted to do a small profile of me & my longtime colleague Sanjay Ghemawat, watch us work for a few hours, maybe dinner, etc.
It came out today. I think it captures our working style really well. https://t.co/cRSMiFfwAP
Over the moon to see that Sarita Adve has won the 2018 ACM/IEEE CS Ken Kennedy award for her amazing contributions to research and mentoring!! Congratulations, Sarita! https://t.co/VywqNObRxg