David Ricardo

Photonics, programming and random thoughts about tech

[David Ricardo @ricarvid19]

@typecraft_dev Personal agent: dotPi

[David Ricardo @ricarvid19]

@dhh The European pensions system is a Ponzi scheme and an extractive institution. It's the elephant in the room and nobody dares to fix it

[David Ricardo @ricarvid19]

@dhh Controversial idea but after reading 'Why Nations fail' the recurring thought I have is that the welfare state/pension system turned Europe into an extractive society that has brought all the stagnation we see now. Refer to the housing crisis for a possible consequence of it.

[David Ricardo @ricarvid19]

@insane_analyst @FundaAI I wonder how $NVDA is going to react to this. Wondering if they pushed too hard for DWDM for scale up (e.g., OCI MSA) and then Ashkan noticed the flaw and left to build something better and more scalable instead...

[David Ricardo @ricarvid19]

@AnalysisOp @PhotonCap Avicena argues uLED targets more scale in which might be feasible if it's cheap enough. Exciting times!

[David Ricardo @ricarvid19]

@PhotonCap SiPh is not the next generation completion. It targets a completely different market, if it exists. $GOOGL wrote that in their OCS paper. You're never getting 1000 radix with SiPh

[David Ricardo @ricarvid19]

@iamfabian @FundaAI Looking forward to read the OCS note :)

[David Ricardo @ricarvid19]

@iamfabian Nice infographics here: https://t.co/1AXx2K5kdp

[SemiAnalysis @SemiAnalysis_]

Conventional datacom microVCSELs are top-emitting, with an emission wavelength at 850 nm, suitable for multimode fibers. Lumentum and Coherent primarily lead in top emitting VCSELs. Light leaves through the p-DBR and it intentionally has less reflectivity to let light exit through the top. The p-metal has to be a ring around the light exit aperture, forcing current to flow sideways into the aperture. This design quirk creates current crowding and extra resistance leading to increased heat generation. These designs usually have thick substrates, however newer device progression trends towards thinner GaAs substrates. This microVCSEL grid is then assembled epitaxial side facing upward and connected through wire bonding. (2/4)

[David Ricardo @ricarvid19]

@iamfabian What about the VCSEL MSA ? New wvl calls for new MSA xD

[David Ricardo @ricarvid19]

@G2AIStack Sipho OCS won't go beyond 100 ports which is sad. It's constrained by first principles of optical integration. Maybe something in the scale in network ?

[David Ricardo @ricarvid19]

@vikramskr Should we go and build inference datacenters everywhere now that AI is comodotizing ? Feels like installing cell phone antennas or building power plants to me.

[David Ricardo @ricarvid19]

@mdmadna @PhotonCap It will hardly achieve 300 ports and that IL without crazy noise added due to compensation

[David Ricardo @ricarvid19]

@PhotonCap The switching doesn't have to be very fast as every time a new link is established the physical channel changes thus the link has to train/sync and that takes seconds so very fast switching is not really needed. Training must happen before data is even sent out.

[David Ricardo @ricarvid19]

@PhotonCap What is key here is the radix. For scale out (kinda $GOOGL) you need lots of ports for the pods. OCS can only leverage on WDM sustainably so GOOGL uses custom WDM. For scale up you could use it but if uLED and uVCSEL pick up then radix is key as SDM is used instead.

[David Ricardo @ricarvid19]

@insane_analyst Is this lightmatter ?

[David Ricardo @ricarvid19]

@semidoped The linewidth requirements for a CPO external lasers are also important. Rings are very sensitive modulators so you need a very good laser to achieve a descent BER.

[David Ricardo @ricarvid19]

(2/2) My guess is that Ciena is mostly interested on PhotonPath's PDK or even on the existing euqlizer building block which could be used to offload some EIC/DSP operations. To be seen

[David Ricardo @ricarvid19]

(1/2) $CIEN Acquires small integrated photonics company to strengthen its integrated photonics capabilities. Very interesting move because I don't think will use any of the existing products PhotonPath offers currently

https://t.co/ZyDHZu9KZu

[David Ricardo @ricarvid19]

@insane_analyst My hypothesis is that EDA tools should incorporate IDE tooling so QoL of designer improves. What if a design suite felt like using VSCode?

[David Ricardo @ricarvid19]

@iamfabian *... are already large and lossy for small radices

[David Ricardo @ricarvid19]

@iamfabian Looking forward to hear more. Just consider that from a first principles POV Sipho doesn't shrink like electronics. Wvg width/bend radius is hard limited by wvl. Can't go smaller so reticle size is the upper limit and these SiPh switch meshes are already large for small radices