Joe Sia 🇮🇩 🇵🇸

Sekedar suka pembahasan komputer, semikonduktor, sejarah, alutsista, dan antariksa. Free 🇵🇸

[Joe Sia 🇮🇩 🇵🇸 @yosiaCS]

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[devalopr @_devalopr]

> A 6 DOF 'coarse stage' that moves extremely fast with long strokes. Actuated using Planar Motors.
> A 6 DOF 'fine stage' on top of the coarse stage. Actuated using 'voice coil' Lorentz actuators.
> Closed loop control using laser interferometers to measure the position of the stages.
> The stages are magnetically levitated to eliminate friction and improve accuracy.
> The whole assembly is placed in a vacuum to eliminate inaccuracies from aerodynamic drag and to eliminate contamination.

https://t.co/Wiar1FKQRh

[Prof. Dr. Erma Yulihastin @EYulihastin]

Penjelasan saya tentang fakta-fakta El Nino 2026 berdasarkan monitoring satelit NOAA di TV CNN pada Sabtu (26/7). Pemanasan di lapisan termoklin lebih tinggi dan lebih luas pada El Nino 2026 dibandingkan dengan 1997. Jika menilik pada proses fisika yang terjadi di laut tersebut, tak harus menunggu Oktober 2026, tapi Agustus 2026 Super El Nino bakal terbentuk seperti telah diprediksi oleh 4 model global ENSO (El Nino Southern Oscillation), yaitu: dari BOM (Australia), JAMSTEC (Jepang), ECMWF (Eropa) dan kini NOAA (Amerika Serikat). Sebagai catatan: selama ini model dari NOAA yang paling underestimated, sedangkan model Access dari BOM menunjukkan hasil yang paling konsisten dan terbukti akurat memprediksi El Nino kuat terbentuk pada bulan Juli 2026. Biar paham, Indonesia tidak punya model global ENSO. Oleh karena itu kita hanya bisa merujuk dan berpatokan pada model-model global utama tersebut.

[Mookafish @Mookafish]

My updated Starship re-entry visual effects

[Chad Wallace @siliconcodesign]

Silicon Co-Design - Interdisciplinary deep-dives to enable full hardware/software co-design of AI Accelerators:

-Mixed-Signal ICs
-Optical/CPO
-High-power PMICs
-Advanced Packaging
-AI Compute Paradigms

I've travelled to the industry flagship conferences including @DACconference this week to bring to you top quality information from leading edge experts that cuts straight through the noise.

This is the definitive publication every engineer in the semiconductor industry needs to read to stay on top of technical challenges.

Link to the website is in my bio.

[SpaceX @SpaceX]

High-speed video of 33 Raptor engines powering the Super Heavy booster on Flight 13

[Nature Unedited @NatureUnedited]

A man was recording the depth of a hole in Arctic ice when a seal unexpectedly surfaced for air right in front of his camera

[Daniel Lemire @lemire]

https://t.co/ypHrQ7yHQU

[Omar Pimentel @OmarJPimentel]

I mean c’mon. This is a real photo 😭

[ZaxtR @AmX_ZaxTr]

If you want a detailed explanation of why Elon Musk converted the Starship vehicle from carbon fiber to stainless steel

[Matthew Gunton @matthewjgunton]

With all the news around Cerebras and AMD, it's worth understanding two of the ways Cerebras is able to produce wafer-size chips when no one else in the industry can

Cerebras focuses on two strategies: PVT calibration and compute-mesh redundancy

PVT Calibration stands for Process, Voltage, Temperature. These 3 variables determine how well transistors switch post-fabrication.

Voltage and Temperature are pretty straight forward. Too much and you burn your core out. Voltage is of course closely related to temperature

You're probably wondering what Process means here
Process refers to the actual creation of the transistor during fab. There can be nanometer-level deviations between one part of the wafer and another (in terms of transistor dimensions, threshold voltage, etc)

When you tape out multiple chips on a single wafer, you can find these variations and either remove that chip or simply make adjustments so that at runtime the chips use different voltages but maintain stability and similar performance

Cerebras had to innovate here because their entire chip is on one wafer

You can see in the image below that when a core is beyond saving there are routes the chip can take to simply route around it. There are redundant cores on the wafer to account for just this kind of failure

But even beyond that, the voltage across the wafer will need to vary to account for process differences across the wafer

This is incredibly difficult to get right and is frankly a testament to their engineering team

As they partner with AMD to handle disaggregation expect Cerebras to leverage their chip's size (which again, literally no one else comes close to replicating)

(Image credits to Irrational Analysis)

[Zack Golden @CSI_Starbase]

WOW New camera angle unlocked!!! What an amazing view of the glowing powerheads!

[Ben Bajarin @BenBajarin]

Meant to post some of these yesterday when I had some time on the floor at AMD event. And of course I took some macros of companion silicon and analog chips :)

MI450 and Compute/networking tray for Helios.

I also got some commentary from execs on the Helios form factor design and why they went with a double wide.

[meng @meng59739449]

1)18A-P node mass production in Q4/2026
2)14A node PDK 0.9 and 1.0 launch in October 2026/March 2027 (reference from 18A PDK 1.0 launch in July 2024 history) mass production in H1/2028
3)A16 and A14 node mass production in H2/2027 and H2/2028

[Epic Maps 🗺️ @theepicmap]

Animation explains why we have seasons on Earth...

[Electrical Knowledge @electric_4u]

How to Identify Components on a Circuit Board

[NASA Administrator Jared Isaacman @NASAAdmin]

Reusable rockets changed the economics of getting to space. On-orbit servicing can change the economics of operating in space.

That’s good for science, good for exploration, and an important capability as we build the @NASAMoonBase.

[Joe Sia 🇮🇩 🇵🇸 @yosiaCS]

@ryanshrout @AMD Good read...!!!

Thank you

[Ryan Shrout @ryanshrout]

With the MI455X, @AMD stopped designing Instinct to win benchmarks and started designing it to win racks. More than 3x the scale-up bandwidth, a jump to 2nm, 432 GB of HBM4, and a native Wave32 redesign aimed at inference. Here is my breakdown of the CDNA 5 architecture, and why the bandwidth story matters more than the 40 petaflop headline.

[Massimo @Rainmaker1973]

This man brushing a crow suddenly stops, but the bird gives the brush back as it wants more

[AMD @AMD]

We are excited to announce that AMD and @AnthropicAI are expanding our strategic partnership to accelerate the development and deployment of next-gen AI infrastructure. Tune in at 9:30am PT tomorrow to hear from Dr. @LisaSu from the #AdvancingAI keynote stage!

✅ Up to 2 GW of AMD Instinct MI450 Series GPUs in AMD Helios
✅ AMD has committed to make a strategic equity investment of up to $5B in Anthropic
✅ Deep engineering collaboration across Claude, ROCm and AMD Instinct

More on the news: https://t.co/zA0vQHTT1c